Business Wire

Rambus Delivers High-Speed SerDes Interface Solutions on GLOBALFOUNDRIES FX-14™ ASIC Platform for Data Center and Enterprise

SUNNYVALE, Calif.--(BUSINESS WIRE)--Rambus Inc. (NASDAQ: RMBS), a leading provider of semiconductor and IP products, today announced the availability of a suite of silicon-proven, high-speed SerDes ...
EDN

THine unveils an advanced SerDes interface for full HD televisions and high-end PCs

THine Electronics, Inc. (JASDAQ:6769), the global leader in LDVS(*1) and other mixed-signal LSI for flat panel displays, unveiled today, V-by-One(TM) 2nd generation, the next generation video signal ...
Yahoo Finance

Faraday Delivers Latest SerDes IP to Complete Interface Lineup on UMC’s 22nm Platform

HSINCHU, Taiwan, June 24, 2025--(BUSINESS WIRE)--Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced the availability of its 10G SerDes IP on ...
The Next Platform

Taking a closer look at Rambus’ 56 Gbps multi-protocol SerDes PHY

February 28, 2017 Matt Proud Comments Off on Taking a closer look at Rambus’ 56 Gbps multi-protocol SerDes PHY Rambus recently announced the launch of its 56G Multi-protocol SerDes (MPS) PHY developed ...
EDN

Flexible, programmable 40 Gbps SerDes framer interface IP core

The folks at Lattice Semiconductor have just announced the availability of the 40 Gbps SERDES Framer Interface, Level 5 (SFI5) Intellectual Property (IP) Core for use in the LatticeSC and LatticeSCM ...
Design-Reuse

LSI Logic Demonstrates 12 Gbit/S Serial Interface Circuitry in 90 Nanometer Process Technology

Increases bandwidth by 400 percent over commonly used SerDes interfaces Easy integration into high speed SerDes cores in LSI Logic cell-based ASIC or RapidChip Platform ASIC designs MILPITAS, Calif., ...
Design-Reuse

Lattice Delivers Flexible, Programmable 40 Gbps Serdes Framer Interface, Level 5 (SFI5) IP Core Solution

HILLSBORO, OR - JANUARY 20, 2009 - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the availability of the 40 Gbps SERDES Framer Interface, Level 5 (SFI5) Intellectual Property (IP) ...
Electronic Design

SerDes Chipset Eliminates External Interfaces

Via a patent-pending, full-duplex control scheme, the MAX9259 and MAX9260 SerDes chipset eliminates the need for a separate CAN or LIN interface in automotive apps. Via a patent-pending, full-duplex ...
Electronic Design

LVDS SerDes chipset meets high-temp analog interface requirements

National Semiconductor Corporation has introduced a low-voltage differential signaling (LVDS) chipset consisting of a SCAN921025H serializer and SCAN921226H deserializer. National Semiconductor ...